@conference {444,
	title = {Real Time Head Detection for Embedded Vision Modules},
	booktitle = {2007 IEEE International Symposium on Intelligent Signal Processing2007 IEEE International Symposium on Intelligent Signal Processing},
	year = {2007},
	month = {10/2007},
	pages = {1 - 6},
	publisher = {IEEE},
	organization = {IEEE},
	address = {Alcala de Henares, Spain},
	abstract = {<p>This paper shows the algorithm implementation for a FPGA based design for people counting using a low level head detection method. Different annular patterns are used to process in parallel the image and detect heads of different sizes. Preprocessing and edge extraction are also made using reconfigurable hardware. The developed system exploits hardware processing as the vision algorithm has been modified and tuned for hardware implementation using almost the 100\% of area resources of a Spartan3 (1.5 Mgates) and performing in real time with similar results than other more sophisticated algorithms while using very low cost circuits.</p>},
	isbn = {978-1-4244-0829-0},
	doi = {10.1109/WISP.2007.4447515},
	url = {http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=4447515},
	author = {Alfredo Gardel and Ignacio Bravo and Pedro Jimenez and Jose L. Lazaro and Torquemada, Antonio}
}
