<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="6.x">Drupal-Biblio</source-app><ref-type>17</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Álvaro Hernández</style></author><author><style face="normal" font="default" size="100%">Garcia, Juan Carlos</style></author><author><style face="normal" font="default" size="100%">Manuel Mazo</style></author><author><style face="normal" font="default" size="100%">Felipe Espinosa</style></author><author><style face="normal" font="default" size="100%">Ureña, J.</style></author><author><style face="normal" font="default" size="100%">María del Carmen Pérez</style></author><author><style face="normal" font="default" size="100%">J. J. García</style></author><author><style face="normal" font="default" size="100%">A. Jiménez</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">FPGA-based Track Circuit for Railways using Transmission Encoding</style></title><secondary-title><style face="normal" font="default" size="100%">IEEE Transactions on Intelligent Transportation Systems</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2011</style></year><pub-dates><date><style  face="normal" font="default" size="100%">06/2011</style></date></pub-dates></dates><publisher><style face="normal" font="default" size="100%">IEEE</style></publisher><volume><style face="normal" font="default" size="100%">99</style></volume><pages><style face="normal" font="default" size="100%">1-12</style></pages><language><style face="normal" font="default" size="100%">English</style></language><issue><style face="normal" font="default" size="100%">1</style></issue></record></records></xml>