<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="6.x">Drupal-Biblio</source-app><ref-type>47</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Alfredo Gardel</style></author><author><style face="normal" font="default" size="100%">Ignacio Bravo</style></author><author><style face="normal" font="default" size="100%">Jose L. Lazaro</style></author><author><style face="normal" font="default" size="100%">Javier Baliñas</style></author><author><style face="normal" font="default" size="100%">Álvaro Hernández</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">Verification of FPGA Internal Resources</style></title><secondary-title><style face="normal" font="default" size="100%">6th IEEE International Symposium on Intelligent Signal Processing (WISP 2009)</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2009</style></year><pub-dates><date><style  face="normal" font="default" size="100%">09/2009</style></date></pub-dates></dates><pages><style face="normal" font="default" size="100%">137-142</style></pages><language><style face="normal" font="default" size="100%">English</style></language></record></records></xml>