Real Time Head Detection for Embedded Vision Modules

Title	Real Time Head Detection for Embedded Vision Modules
Publication Type	Conference Paper
Año de publicación	2007
Autores	Gardel, A, Bravo, I, Jimenez, P, Lazaro, JL, Torquemada, A
Idioma de publicación	English
Conference Name	2007 IEEE International Symposium on Intelligent Signal Processing2007 IEEE International Symposium on Intelligent Signal Processing
Páginas	1 - 6
Editorial	IEEE
Conference Location	Alcala de Henares, Spain
Fecha de publicación	10/2007
Numero ISBN	978-1-4244-0829-0
DOI	10.1109/WISP.2007.4447515
URL	http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=4447515
Abstract	This paper shows the algorithm implementation for a FPGA based design for people counting using a low level head detection method. Different annular patterns are used to process in parallel the image and detect heads of different sizes. Preprocessing and edge extraction are also made using reconfigurable hardware. The developed system exploits hardware processing as the vision algorithm has been modified and tuned for hardware implementation using almost the 100% of area resources of a Spartan3 (1.5 Mgates) and performing in real time with similar results than other more sophisticated algorithms while using very low cost circuits.

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