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    Export 4 results:
      2020
      R. Nieto, E. Diaz, R. Mateo, and A. Hernandez, “Evaluation of Software Inter-Processor Synchronization Methods for the Zynq-UltraScale+ Architecture.”, in XXXV Conference on Design of Circuits and Integrated Systems (DCIS 2020, 2020, p. 1-5.
      R. Nieto, R. Mateo, and A. Hernandez, “Heterogeneous SoC Architecture for a FBMC Receiver with Channel Estimator and Channel Equalizer in PLC.”, in IEEE International Symposium on Power Line Communications and its Applications (ISPLC 2020)., 2020, p. 1-6.
      2019
      R.Nieto, R. Mateo, A. Hernandez, and E. Diaz, “Dual-Core Architecture for PLC Channel Estimator and ASCET Equalizer in a FBMC Transmultiplexer”, in 24th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA), Zaragoza, España , 2019, p. 1342-1345.
      F. Nombela, E. Garcia, R. Mateo, and A. Hernandez, “Real-time architecture for channel estimation and equalization in broadband PLC”, Microprocessors and Microsystems , p. 121-135, 2019.

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